Substrates with electronically active components such as transistors or light-emitting diodes distributed over the extent of the substrate can be used in a variety of electronic systems, for example, flat-panel imaging devices such as flat-panel liquid crystal or organic light emitting diode (OLED) display devices and in flat-panel solar cells. A variety of methods may be used to distribute electronically active circuits over substrates, including forming the electronically active circuits on a substrate, for example thin-film transistor circuits, or forming the components on separate substrates and placing them on a substrate. In the latter case, a variety of assembly technologies for device packaging may be used.
One method for transferring active components from one substrate to another is described in “AMOLED Displays using Transfer-Printed Integrated Circuits” published in the Proceedings of the 2009 Society for Information Display International Symposium Jun. 2-5, 2009, in San Antonio Tex., US, vol. 40, Book 2, ISSN 0009-0966X, paper 63.2 p. 947. In this approach, small integrated circuits are formed over a buried oxide layer on the process side of a crystalline wafer. The small integrated circuits, or chiplets, are released from the wafer by etching the buried oxide layer formed beneath the circuits. A PDMS stamp is pressed against the wafer and the process side of the chiplets is adhered to the stamp. The chiplets are pressed against a destination substrate or backplane coated with an adhesive and thereby adhered to the destination substrate. The adhesive is subsequently cured. In another example, U.S. Pat. No. 8,722,458 entitled Optical Systems Fabricated by Printing-Based Assembly teaches transferring light-emitting, light-sensing, or light-collecting semiconductor elements from a wafer substrate to a destination substrate or backplane.
In such methods, it is important that pixels in the display are properly functional. The light-emitting semiconductor elements can be tested after they are transferred to the destination substrate and the display rejected if too many faulty light-emitters are found. Alternatively, as described in U.S. Pat. No. 9,142,468, the small integrated circuits on the wafer can be tested before transfer. In this approach, an integrated circuit test structure comprises a substrate and an anchor area comprising one or more electrical elements to conduct an electrical test signal. The anchor area is physically secured to a surface of the substrate. At least one printable electronic component comprises an active layer including one or more active element. The at least one printable electronic component is suspended over the surface of the substrate by electrically conductive breakable tethers that physically secure and electrically connect the at least one printable electronic component to the anchor area to provide the electrical test signal to the one or more active elements. Each of the electrically conductive breakable tethers comprises an insulating layer and a conductive layer thereon that are configured to be preferentially fractured responsive to pressure applied thereto to release the at least one printable electronic component from the substrate. However, electrically conductive breakable tethers limit the materials and number of electrical connections that can be provided to an integrated circuit.
U.S. Pat. No. 9,165,989 discloses a method of assembling integrated circuit elements on a receiving substrate. If one of the integrated circuits is defective, it can be removed from the wafer before assembling. The method comprises providing a wafer having a plurality of chiplets thereon, determining that at least one of the chiplets on the wafer is defective, selectively removing the at least one of the chiplets that is defective from the wafer to define at least one empty chiplet location on the wafer between ones of the chiplets on the wafer prior to transferring the ones of the chiplets onto the receiving substrate, printing the ones of the chiplets from the wafer onto the receiving substrate in parallel, using a stamp that separates the ones of the chiplets from the wafer and adheres the ones of the chiplets thereto, to define the at least one empty chiplet location therebetween on the receiving substrate, and printing at least one additional chiplet onto to the at least one empty chiplet location on the receiving substrate. Thus, as described in U.S. patent application Ser. No. 14/848,477, a wafer of chiplets can comprise a source substrate having an array of regularly-spaced chiplet locations thereon and a plurality of chiplets native to the source substrate. Each chiplet of the plurality of chiplets is disposed on the source substrate in one of the chiplet locations in the array, wherein one or more of the chiplet locations in the array is a removed-chiplet location that is devoid of a chiplet.
There is a need, therefore, for structures and methods that enable the testing and disposition of functional micro-devices on destination substrates (e.g., large-format destination substrates).